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عنوان
SystemVerilog assertions and functional coverage :guide to language, methodology and applications
پدید آورنده
Mehta, Ashok B.,Ashok B. Mehta
موضوع
، Verilog )Computer hardware description language(,Design and construction ، Electronic digital computers,Verification ، Integrated circuits,، Engineering,، Circuits and Systems,، Electronics and Microelectronics, Instrumentation,، Processor Architectures
رده
TK7885
.
7
کتابخانه
كتابخانه و مركز اسناد دانشگاه كردستان
محل استقرار
استان:
کردستان
ـ شهر:
سنندج
تماس با کتابخانه :
33624006
-
087
2147
Mehta, Ashok B.
author
SystemVerilog assertions and functional coverage :guide to language, methodology and applications
1 online resource )xxxiii, 356 pages( : illustrations
Includes index
Introduction -- System Verilog Assertions -- Immediate Assertions -- Concurrent Assertions Basics )sequence, property, assert(.- Sampled Value Functions $rose, $fell -- Operators -- System Functions and Tasks -- Multiple clocks -- Local Variables -- Recursive property -- Detecting and using endpoint of a sequence -- expect -- assume and formal )static functional( verification -- Other important topics -- Asynchronous Assertions !!! -- IEEE-0081 9002 Features -- SystemVerilog Assertions LABs -- System Verilog Assertions LAB Answers -- Functional Coverage -- Performance Implications of coverage methodology -- Coverage Options )Reference material(
، Verilog )Computer hardware description language(
Design and construction ، Electronic digital computers
Verification ، Integrated circuits
، Engineering
، Circuits and Systems
، Electronics and Microelectronics, Instrumentation
، Processor Architectures
621
.
39/2
TK7885
.
7
AU
Ashok B. Mehta
TI
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