Lecture notes in electrical engineering,6781-0011 ;v.562
GENERAL NOTES
Text of Note
Includes bibliographical references
CONTENTS NOTE
Text of Note
Formal Plausibility Checks for Environment -- Efficient Refinement Strategy Exploiting Component Properties in A CEGAR Process -- Formal Specification Level -- Power Estimation Methodology for SystemC -- SystemC Analysis for Nondeterminism Anomalies -- A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS -- Configurable Load Emulation Using FPGA and Power Amplifiers for Automotive Power ICs -- Model Based Design of Distributed Embedded Cyber Physical Systems -- Model-driven Methodology for the Development of Multi-level Executable Environments -- The Concept and Study of Grid Responsiveness -- Polynomial Metamodel-Based Fast Optimization of Nanoscale PLL Components -- Methodology and Example-Driven Interconnect Synthesis for Designing Heterogenous Coarse-Grain Reconfigurable Architectures
TOPICAL NAME USED AS SUBJECT
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Congresses ، Embedded computer systems - Design and construction
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Congresses ، Integrated circuits - Design and construction
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، Engineering
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، Circuits and Systems
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، Processor Architectures
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، Electronics and Microelectronics, Instrumentation
DEWEY DECIMAL CLASSIFICATION
Number
006
.
2/2
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK7895
.
E42
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
AU
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Jan Haase, editor
AU naJ ,esaaH editor of compilation
TI
SE
SE Lecture notes in electrical engineering ;
CORPORATE BODY NAME - SECONDARY RESPONSIBILITY
Entry Element
FDL )Conference()2012 :Vienna University of Technology(